ESD hazard analysis and protection circuit design plan

Electrostatic discharge (ESD) can bring fatal hazards to electronic products. It not only reduces product reliability and increases maintenance costs, but also does not comply with the industrial standard EN61000-4-2 specified by the European Community, and the product cannot be used in Europe Sales. Therefore, electronic equipment manufacturers usually consider ESD protection at the early stage of circuit design. This article will discuss several methods of ESD protection circuits.

The hazards of ESD
ESD can basically be divided into three types: one is ESD caused by various machines, the other is ESD caused by furniture movement or equipment movement, and the third is ESD caused by human contact or equipment movement. These three kinds of ESD are very important for the production of semiconductor devices and the production of electronic products. Electronic products are most susceptible to damage from the third type of ESD during use, and portable electronic products are particularly susceptible to damage from ESD caused by human contact. Under normal circumstances, ESD will damage the interface devices connected to it. Another situation is that the device after ESD impact may not be damaged immediately, but the performance degradation will cause the product to fail prematurely.

When an integrated circuit (IC) is subjected to ESD, the resistance of the discharge circuit is usually very small and cannot limit the discharge current. For example, when a static-charged cable is inserted into a circuit interface, the resistance of the discharge circuit is almost zero, causing an instantaneous discharge spike current of up to tens of amperes to flow into the corresponding IC pin. The instantaneous high current will seriously damage the IC, and the localized heat may even melt the silicon die. The damage of ESD to IC also includes the internal metal connection is burned, the passivation layer is damaged, and the transistor unit is burned out. ESD can also cause IC deadlock (LATCHUP). This effect is related to the activation of the thyristor-like structural unit inside the CMOS device. High voltage can activate these structures to form a high current channel, generally from VCC to ground. The deadlock current of serial interface devices can be as high as 1A. The deadlock current will remain until the device is powered off. But by then, the IC is usually burned out due to overheating. After ESD strikes, there may be two problems that are not easy to be found. General users and IEC testing organizations use the traditional "loop feedback method" and "insertion method" for testing, and these two problems are usually not detected.

The second method of ESD protection is shielding to prevent large ESD currents from impacting internal circuits. When ESD strikes the metal shielding enclosure, the first few milliseconds will be much higher than the protective ground voltage. The shielding enclosure voltage will drop with the transfer of ESD charges, so the internal circuit will have a secondary ESD impact within the first few milliseconds, so only The use of external shielding is not enough, the internal circuit and the shielding shell must share the same ground, or the internal circuit must be dielectrically isolated. Electrical isolation is also an effective method to suppress ESD impact. Installing optocouplers or transformers on the PCB can not completely eliminate the ESD impact, but the combination of dielectric isolation and shielding can well suppress EDS impacts, especially optocouplers and transformers. Suitable for power supply part. The best isolation of the signal path is optical fiber, wireless and infrared.